MC68HC812A4 Datasheet, PDF (178/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
12.4 Register Map
NOTE:
The register block can be mapped to any 2-Kbyte boundary within the
standard 64-Kbyte address space. The register block occupies the first
512 bytes of the 2-Kbyte block. This register map shows default
addressing after reset.
Addr.
Register Name
Bit 7
$0080
Timer IC/OC Select ^Read: _IOS7
Register (TIOS) Write:
See page 186. _{Reset: 0}
$0081
Timer Compare Force
Register (CFORC)
See page 187.
Read:
Write:
Reset:
FOC7
0
$0082
Timer Output
Compare 7 Mask
Register (OC7M)
See page 187.
Read:
Write:
Reset:
OC7M7
0
$0083
Timer Output
Compare 7 Data
Register (OC7D)
See page 188.
Read:
Write:
Reset:
OC7D7
0
Timer Counter Register
$0084
High (TCNTH)
See page 189.
Read:
Write:
Reset:
Bit 15
0
Timer Counter Register ^{Read: Bit 7}
$0085
Low (TCNTL) Write:
See page 189. _{Reset: 0}
Timer System Control ^Read: _TEN
$0086
Register (TSCR) Write:
See page 190. _{Reset: 0}
$0087
Reserved
R
6
IOS6
0
FOC6
0
OC7M6
0
OC7D6
0
14
0
6
0
TSWAI
0
R
5
IOS5
0
FOC5
0
OC7M5
0
OC7D5
0
13
0
5
0
TSBCK
0
R
4
IOS4
0
FOC4
0
OC7M4
0
OC7D4
0
12
0
4
0
TFFCA
0
R
3
IOS3
0
FOC3
0
OC7M3
0
OC7D3
0
11
0
3
0
0
0
R
2
IOS2
0
FOC2
0
OC7M2
0
OC7D2
0
10
0
2
0
0
0
R
1
IOS1
0
FOC1
0
OC7M1
0
OC7D1
0
9
0
1
0
0
0
R
Bit 0
IOS0
0
FOC0
0
OC7M0
0
OC7D0
0
Bit 8
0
Bit 0
0
0
0
R
= Unimplemented
R = Rserved
Figure 12-2. I/O Register Summary (Sheet 1 of 5)
MC68HC812A4 — Rev. 3.0
178
Standard Timer Module
Advance Information
MOTOROLA