MC68HC812A4 Datasheet, PDF (128/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Memory Expansion and Chip-Select
Table 8-3. Example Register Settings
Register
WINDEF
MXAR
CSCTL0
CSCTL1
MISC
Value
$E0
$01
%00111xxx
$18
%0xxxxxxx
Meaning
Enable EPAGE, DPAGE, PPAGE
Port G bit 0 assigned as extended
address ADDR16
Enables CSP0, CSD, and CS3
Makes CSD follow $0000–$7FFF and
CS3 select EPAGE
Puts EPAGE at $0400–$09FF
8.4 Chip-Select Stretch
Each chip-select can be chosen to stretch bus cycles associated with it.
Stretch can be zero, one, two or three whole cycles added which allows
interfacing to external devices which cannot meet full bus speed timing.
Figure 8-3, Figure 8-4, Figure 8-5, and Figure 8-6 show the waveforms
for zero to three cycles of stretch.
INTERNAL
E-CLOCK
CS
ECLK PIN
UNSTRETCHED BUS CYCLE
Figure 8-3. Chip-Select with No Stretch
INTERNAL
E-CLOCK
CS
STRETCHED
ECLK PIN
STRETCHED BY 1 CYCLE
Figure 8-4. Chip-Select with One-Cycle Stretch
MC68HC812A4 — Rev. 3.0
128
Memory Expansion and Chip-Select
Advance Information
MOTOROLA