MC68HC812A4 Datasheet, PDF (246/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Communications Interface Module (SCI)
The WAKE bit in SCI control register 1 (SCCR1) determines how the SCI
is brought out of the standby state to process an incoming message. The
WAKE bit enables either idle line wakeup or address mark wakeup:
• Idle input line wakeup (WAKE = 0) — In this wakeup method, an
idle condition on the RXD pin clears the RWU bit and wakes up the
SCI. The initial frame or frames of every message contain
addressing information. All receivers evaluate the addressing
information, and receivers for which the message is addressed
process the frames that follow. Any receiver for which a message
is not addressed can set its RWU bit and return to the standby
state. The RWU bit remains set and the receiver remains on
standby until another idle character appears on the RXD pin.
Idle line wakeup requires that messages be separated by at least
one idle character and that no message contains idle characters.
The idle character that wakes a receiver does not set the receiver
idle flag, IDLE, or the receive data register full flag, RDRF.
The idle line type bit, ILT, determines whether the receiver begins
counting logic 1s as idle character bits after the start bit or after the
stop bit. ILT is in SCI control register 1 (SCCR1).
• Address mark wakeup (WAKE = 1) — In this wakeup method, a
logic 1 in the most significant bit (MSB) position of a frame clears
the RWU bit and wakes up the SCI. The logic 1 in the MSB
position marks a frame as an address frame that contains
addressing information. All receivers evaluate the addressing
information, and the receivers for which the message is addressed
process the frames that follow. Any receiver for which a message
is not addressed can set its RWU bit and return to the standby
state. The RWU bit remains set and the receiver remains on
standby until another address frame appears on the RXD pin.
The logic 1 MSB of an address frame clears the receiver’s RWU
bit before the stop bit is received and sets the RDRF flag.
Address mark wakeup allows messages to contain idle characters
but requires that the MSB be reserved for use in address frames.
NOTE: With the WAKE bit clear, setting the RWU bit after the RXD pin has been
idle can cause the receiver to wake up immediately.
MC68HC812A4 — Rev. 3.0
246
Serial Communications Interface Module (SCI)
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