MC68HC812A4 Datasheet, PDF (190/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
12.6.6 Timer System Control Register
Address: $0086
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
TEN TSWAI TSBCK TFFCA
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-10. Timer System Control Register (TSCR)
Read: Anytime
Write: Anytime
TEN — Timer Enable Bit
TEN enables the timer. Clearing TEN reduces power consumption.
1 = Timer enabled
0 = Timer and timer counter disabled
When the timer is disabled, there is no divided-by-64 clock for the PA
since the prescaler generates the M ÷ 64 clock.
TSWAI — Timer Stop in Wait Mode Bit
TSWAI disables the timer and PA in wait mode.
1 = Timer and PA disabled in wait mode
0 = Timer and PA enabled in wait mode
NOTE: If timer and PA interrupt requests are needed to bring the MCU out of
wait mode, clear TSWAI before executing the WAIT instruction.
TSBCK — Timer Stop in Background Mode Bit
TSBCK stops the timer during background mode.
1 = Timer disabled in background mode
0 = Timer enabled in background mode
NOTE: Setting TSBCK does not stop the PA when it is in event counter mode.
MC68HC812A4 — Rev. 3.0
190
Standard Timer Module
Advance Information
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