MC68HC812A4 Datasheet, PDF (35/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

General Description
Signal Descriptions
Table 1-2. Pin Descriptions (Continued)
Pin
Port
Description
ADDR21–ADDR16 Port G Memory expansion and general-purpose I/O
CS3–CS0,CSD,
CSP1, CSP0
Port F
Chip selects
General-purpose I/O
BKGD
—
Single-wire background debug pin
Mode-select pin that determines special or normal operating mode after reset
KWD7–KWD0
KWH7–KWH0
Port D _{Key wakeup pins that can generate interrupt requests on high-to-low transitions}
Port H ^{General-purpose I/O}
KWJ7–KWJ0
Port J
Key wakeup pins that can generate interrupt requests on any transition
General-purpose I/O
RxD0
PS0 Receive pin for SCI0
TxD0
PS1 Transmit pin for SCI0
RxD1
PS2 Receive pin for SCI1
TxD1
PS3 Transmit pin for SCI1
SDI/MISO
PS4 Master in/slave out pin for SPI
SDO/MOSI
PS5 Master out/slave in pin for SPI
SCK
PS6 Serial clock for SPI
SS
PS7 Slave select output for SPI in master mode; slave select input in slave mode
IOC7–IOC0
Port T Input capture or output compare channels and pulse accumulator input
1. The MCU operates from a single power supply. Use the customary bypass techniques as very fast signal transitions occur
on MCU pins.
2. Separate power supply pins allow the ADC power supply to be bypassed independently of the MCU power supply.
3. Out of reset the frequency applied to EXTAL is twice the desired E-clock rate. On reset all device clocks are derived from
the EXTAL input frequency. XTAL is the crystal output.
4. LSTRB is the exclusive-NOR of A0 and the internal SZ8 signal. SZ8 indicates the size 16/8 access.
5. After reset, MODA and MODB can be configured as instruction queue tracking signals IPIPE0 and IPIPE1 or as gener-
al-purpose I/O pins.
Advance Information
MOTOROLA
General Description
MC68HC812A4 — Rev. 3.0
35