MC68HC812A4 Datasheet, PDF (235/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Communications Interface Module (SCI)
Functional Description
break character guarantees the recognition of the start bit of the next
frame.
The SCI recognizes a break character when a start bit is followed by
eight or nine logic 0 data bits and a logic 0 where the stop bit should be.
Receiving a break character has these effects on SCI registers:
• Sets the framing error flag, FE
• Sets the receive data register full flag, RDRF
• Clears the SCI data registers, SCDRH/L
• May set the overrun flag, OR, noise flag, NF, parity error flag,
PE, or the receiver active flag, RAF (see 14.7.4 SCI Status
Register 1)
14.6.3.4 Idle Characters
An idle character contains all logic 1s and has no start, stop, or parity bit.
Idle character length depends on the M bit in SCI control register 1
(SCCR1). The preamble is a synchronizing idle character that begins the
first transmission initiated after writing the TE bit from 0 to 1.
If the TE bit is cleared during a transmission, the TXD pin becomes idle
after completion of the transmission in progress. Clearing and then
setting the TE bit during a transmission queues an idle character to be
sent after the frame currently being transmitted.
NOTE:
When queueing an idle character, return the TE bit to logic 1 before the
stop bit of the current frame shifts out to the TXD pin. Setting TE after
the stop bit appears on TXD causes data previously written to the SCI
data register to be lost.
Toggle the TE bit for a queued idle character when the TDRE flag
becomes set and immediately before writing the next byte to the SCI
data register.
Advance Information
MOTOROLA
Serial Communications Interface Module (SCI)
MC68HC812A4 — Rev. 3.0
235