MC68HC812A4 Datasheet, PDF (65/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Central Processor Unit (CPU12)
Addressing Modes
3.6 Addressing Modes
Addressing modes determine how the CPU accesses memory locations
to be operated upon. The CPU12 includes all of the addressing modes
of the M68HC11 CPU as well as several new forms of indexed
addressing. Table 3-1 is a summary of the available addressing modes.
Table 3-1. Addressing Mode Summary
Addressing Mode
Inherent
Immediate
Source Format
INST
INST #opr8i
or
INST #opr16i
Direct
INST opr8a
Extended
Relative
Indexed
(5-bit offset)
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto
post-decrement)
Indexed
(auto post-increment)
Indexed
(accumulator offset)
Indexed
(9-bit offset)
Indexed
(16-bit offset)
INST opr16a
INST rel8
or
INST rel16
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,+xys
INST oprx3,xys–
INST oprx3,xys+
INST abd,xysp
INST oprx9,xysp
INST oprx16,xysp
Indexed-indirect
(16-bit offset)
INST [oprx16,xysp]
Indexed-indirect
(D accumulator
offset)
INST [D,xysp]
Abbreviation
Description
INH
Operands (if any) are in CPU registers.
IMM
Operand is included in instruction stream.
8- or 16-bit size implied by context
DIR
Operand is the lower 8 bits of an address in the
range $0000–$00FF.
EXT
Operand is a 16-bit address
REL
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction.
IDX
5-bit signed constant offset from x, y, sp, or pc
IDX
Auto pre-decrement x, y, or sp by 1 ~ 8
IDX
Auto pre-increment x, y, or sp by 1 ~ 8
IDX
Auto post-decrement x, y, or sp by 1 ~ 8
IDX
IDX
IDX1
IDX2
[IDX2]
[D,IDX]
Auto post-increment x, y, or sp by 1 ~ 8
Indexed with 8-bit (A or B) or 16-bit (D)
accumulator offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
Advance Information
MOTOROLA
Central Processor Unit (CPU12)
MC68HC812A4 — Rev. 3.0
65