MC68HC812A4 Datasheet, PDF (278/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Peripheral Interface (SPI)
MODF — Mode Fault Flag
MODF is set if the PS7 pin goes to logic 0 when it is configured as the
SS input of a master SPI (MSTR = 1 and DDR7 = 0). Clear MODF by
reading the SPI status register with MODF set and then writing to SPI
control register 1.
1 = Mode fault
0 = No mode fault
NOTE: MODF is inhibited when the PS7 pin is configured as:
• The SS output, DDRS7 = 1 and SSOE = 1, or
• A general-purpose output, DDRS7 = 1 and SSOE = 0
15.7.5 SPI Data Register
Address: $00D5
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Unaffected by reset
Figure 15-13. SPI Data Register (SP0DR)
Read: Anytime; normally, only after SPIF flag set
Write: Anytime a data transfer is not taking place
The SPI data register is both the input and output register for SPI data.
Reads are double-buffered but writes cause data to be written directly
into the SPI shift register. The data registers of two SPIs can be
connected through their MOSI and MISO pins to form a distributed 16-bit
register. A transmission between the SPIs shifts the data eight bit
positions, exchanging the data between the master and the slave. The
slave can also be another simpler device that only receives data from the
master or that only sends data to the master.
MC68HC812A4 — Rev. 3.0
278
Serial Peripheral Interface (SPI)
Advance Information
MOTOROLA