MC68HC812A4 Datasheet, PDF (184/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
An output compare on channel 7 overrides output compares on all other
output compare channels. A channel 7 output compare causes any
unmasked bits in the output compare 7 data register to transfer to the
timer port data register. The output compare 7 mask register masks the
bits in the output compare 7 data register. The timer counter reset
enable bit, TCRE, enables channel 7 output compares to reset the timer
counter. A channel 7 output compare can reset the timer counter even if
the OC7/PAI pin is being used as the pulse accumulator input.
An output compare overrides the data direction bit of the output compare
pin but does not change the state of the data direction bit.
Writing to the timer port bit of an output compare pin does not affect the
pin state. The value written is stored in an internal latch. When the pin
becomes available for general-purpose output, the last value written to
the bit appears at the pin.
12.5.4 Pulse Accumulator
The pulse accumulator (PA) is a 16-bit counter that can operate in two
modes:
• Event counter mode — Counting edges of selected polarity on the
pulse accumulator input pin, PAI
• Gated time accumulation mode — Counting pulses from a
divide-by-64 clock
The PA mode bit, PAMOD, selects the mode of operation.
The minimum pulse width for the PAI input is greater than two module
clocks.
MC68HC812A4 — Rev. 3.0
184
Standard Timer Module
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