MC68HC812A4 Datasheet, PDF (277/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Peripheral Interface (SPI)
SPI Register Descriptions and Reset Initialization
15.7.4 SPI Status Register
Address: $00D3
Bit 7
6
5
4
3
2
1
Bit 0
Read: SPIF WCOL
0
MODF
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 15-12. SPI Status Register (SP0SR)
Read: Anytime
Write: Has no meaning or effect
SPIF — SPI Flag
SPIF is set after the eighth serial clock cycle of a transmissson. SPIF
generates an interrupt request if the SPIE bit in SPI control register 1
is set also. Clear SPIF by reading the SPI status register with SPIF
set and then reading or writing to the SPI data register.
1 = Transfer complete
0 = Transfer not complete
WCOL — Write Collision Flag
WCOL is set when a write to the SPI data register occurs during a
data transfer. The byte being transferred continues to shift out of the
shift register, and the data written during the transfer is lost. WCOL
does not generate an interrupt request. WCOL can be read when the
transfer in progress is complete. Clear WCOL by reading the SPI
status register with WCOL set and then reading or writing to the SPI
data register.
1 = Write collision
0 = No write collision
Advance Information
MOTOROLA
Serial Peripheral Interface (SPI)
MC68HC812A4 — Rev. 3.0
277