MC68HC812A4 Datasheet, PDF (298/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Analog-to-Digital Converter (ATD)
16.7.7 ATD Status Registers
Address: $0066
Bit 7
6
5
4
3
2
1
Bit 0
Read: SCF
0
0
0
0
CC2
CC1
CC0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-9. ATD Status Register 1 (ATDSTAT1)
Address: $0067
Bit 7
6
5
4
3
2
1
Bit 0
Read: CCF7 CCF6 CCF5 CCF4 CCF3 CCF2 CCF1 CCF0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-10. ATD Status Register 2 (ATDSTAT2)
Read: Anytime
Write: Special mode only
SCF — Sequence Complete Flag
In single conversion sequence mode (SCAN = 0 in ATDCTL5), SCF
is set at the end of the conversion sequence.
In continuous conversion mode (SCAN = 1 in ATDCTL5), SCF is set
at the end of the first conversion sequence.
Clear SCF by writing to control register 5 (ATDCTL5) to initiate a new
conversion sequence. When the fast flag clear enable bit, AFFC, is
set, SCF is cleared after the first result register is read.
CC2–CC0 — Conversion Counter Bits
This 3-bit value reflects the value of the conversion counter pointer in
either a 4-conversion or 8-conversion sequence. The pointer shows
which channel is currently being converted and which result register
will be written next.
MC68HC812A4 — Rev. 3.0
298
Analog-to-Digital Converter (ATD)
Advance Information
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