MC68HC812A4 Datasheet, PDF (186/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
The PA counter registers, TIMPACNTH/L reflect the number of pulses
from the divided-by-64 clock since the last reset.
NOTE: The timer prescaler generates the divided-by-64 clock. If the timer is not
active, there is no divided-by-64 clock.
PULSE
ACCUMULATOR
PAD
CHANNEL 7 OUTPUT COMPARE
OM7
OL7
OC7M7
Figure 12-3. Channel 7 Output Compare/Pulse Accumulator Logic
12.6 Registers and Reset Initialization
This section describes the registers and reset initialization.
12.6.1 Timer IC/OC Select Register
Address: $0080
Bit 7
6
5
4
3
2
1
Bit 0
Read:
IOS7 IOS6 IOS5 IOS4 IOS3 IOS2 IOS1 IOS0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 12-4. Timer IC/OC Select Register (TIOS)
Read: Anytime
Write: Anytime
IOS7–IOS0 — Input Capture or Output Compare Select Bits
The IOSx bits enable input capture or output compare operation for
the corresponding timer channel.
1 = Output compare enabled
0 = Input capture enabled
MC68HC812A4 — Rev. 3.0
186
Standard Timer Module
Advance Information
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