MC68HC812A4 Datasheet, PDF (156/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Clock Module
10.4 Register Map
NOTE:
The register block can be mapped to any 2-Kbyte boundary within the
standard 64-Kbyte address space. The register block occupies the first
512 bytes of the 2-Kbyte block. This register map shows default
addressing after reset.
Addr.
Register Name
$0014
Real-Time Interrupt
Control Reg. (RTICTL)
See page 161.
Read:
Write:
Reset:
Real-Time Interrupt
$0015
Flag Register (RTIFLG)
See page 163.
Read:
Write:
Reset:
$0016
COP Control Register
(COPCTL)
See page 163.
Read:
Write:
Reset:
Special reset:
$0017
Arm/Reset COP
Register (COPRST)
See page 166.
Read:
Write:
Reset:
Bit 7
RTIE
0
RTIF
0
CME
0
0
0
Bit 7
0
6
5
RSWAI RSBCK
0
0
0
0
0
0
FCME FCM
0
0
0
0
0
0
Bit 6 Bit 5
0
0
= Unimplemented
4
0
0
0
0
FCOP
0
0
0
Bit 4
0
3
RTBYP
0
0
0
DISR
0
1
0
Bit 3
0
2
RTR2
0
0
0
CR2
0
1
0
Bit 2
0
Figure 10-3. Clock Function Register Map
1
RTR1
0
0
0
CR1
0
1
0
Bit 1
0
Bit 0
RTR0
0
0
0
CR0
0
1
0
Bit 0
0
10.5 Functional Description
This section provides a functional description of the MC68HC812A4.
10.5.1 Computer Operating Properly (COP)
The COP or watchdog timer is an added check that a program is running
and sequencing properly. When the COP is being used, software is
responsible for keeping a free-running watchdog timer from timing out. If
the watchdog timer times out, it is an indication that the software is no
MC68HC812A4 — Rev. 3.0
156
Clock Module
Advance Information
MOTOROLA