MC68HC812A4 Datasheet, PDF (183/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
Functional Description
In 8-bit MCUs, the low byte of the timer channel register (TIMCxL) is held
for one bus cycle after the high byte (TIMCxH) is read. This allows
coherent reading of the timer channel such that an input capture does
not occur between two back-to-back 8-bit reads. To read the 16-bit timer
channel register, use a double-byte read instruction such as LDD or
LDX.
The minimum pulse width for the input capture input is greater than two
module clocks.
The input capture function does not force data direction. The timer port
data direction register controls the data direction of an input capture pin.
Pin conditions can trigger an input capture on a pin configured as an
input. Software can trigger an input capture on an input capture pin
configured as an output.
An input capture on channel x sets the CxF flag. The CxI bit enables the
CxF flag to generate interrupt requests.
12.5.3 Output Compare
Setting the I/O select bit, IOSx, configures channel x as an output
compare channel. The output compare function can generate a periodic
pulse with a programmable polarity, duration, and frequency. When the
timer counter reaches the value in the channel registers of an output
compare channel, the timer can set, clear, or toggle the channel pin. An
output compare on channel x sets the CxF flag. The CxI bit enables the
CxF flag to generate interrupt requests.
The output mode and level bits, OMx and OLx, select set, clear, or toggle
on output compare. Clearing both OMx and OLx disconnects the pin
from the output logic.
Setting a force output compare bit, FOCx, causes an immediate output
compare on channel x. A forced output compare does not set the
channel flag.
Advance Information
MOTOROLA
Standard Timer Module
MC68HC812A4 — Rev. 3.0
183