MC68HC812A4 Datasheet, PDF (46/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Register Block
Addr.
$0016
$0017
$0018
↓
$001D
Register Name
COP Control Register
(COPCTL)
See page 163.
Read:
Write:
Reset:
Arm/Reset COP ^Read:
Register (COPRST) Write:
See page 166. _Reset:
Reserved
↓
Reserved
Bit 7
CME
0
0
Bit 7
0
R
R
6
FCME
0
0
Bit 6
0
R
R
5
FCM
0
0
Bit 5
0
R
R
4
FCOP
0
0
Bit 4
0
R
R
3
DISR
0
0
Bit 3
0
R
R
2
CR2
1
0
Bit 2
0
R
R
1
CR1
1
0
Bit 1
0
R
R
Bit 0
CR0
1
0
Bit 0
0
R
R
Interrupt Control ^Read: _{IRQE IRQEN}
DLY
0
0
0
0
0
$001E
Register (INTCR) Write:
See page 73. _{Reset: 0}
1
1
0
0
0
0
0
Highest Priority I ^{Read: 1}
$001F Interrupt Reg. (HPRIO) Write:
See page 74. _{Reset: 1}
1
0
PSEL5 PSEL4 PSEL3 PSEL2 PSEL1
1
1
1
0
0
1
0
Port D Key Wakeup ^Read: _{Bit 7}
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
$0020 Interrupt Enable Reg. Write:
(KWIED) See page 145. _{Reset: 0}
0
0
0
0
0
0
0
Port D Key Wakeup ^Read: _{Bit 7}
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
$0021 Flag Register (KWIFD) Write:
See page 146. _{Reset: 0}
0
0
0
0
0
0
0
$0022
Reserved
R
R
R
R
R
R
R
R
$0023
Reserved
R
R
R
R
R
R
R
R
Port H Data Register ^Read: _PH7
PH6
PH5
$0024
(PORTH) Write:
See page 146. _{Reset: 0}
0
0
Port H Data Direction ^Read: _{Bit 7}
Bit 6
Bit 5
$0025
Register (DDRH) Write:
See page 147. _{Reset: 0}
0
0
Port H Key Wakeup ^Read: _{Bit 7}
Bit 6
Bit 5
$0026 Interrupt Enable Reg. Write:
(KWIEH) See page 147. _{Reset: 0}
0
0
= Unimplemented
PH4
PH3
PH2
PH1
PH0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
R = Reserved
U = Unaffected
Figure 2-1. Register Map (Sheet 3 of 15)
MC68HC812A4 — Rev. 3.0
46
Register Block
Advance Information
MOTOROLA