MC68HC812A4 Datasheet, PDF (132/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Memory Expansion and Chip-Select
8.5.5 Data Page Register
Address: $0034
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PD19
Write:
PD18
PD17
PD16
PD15
PD14
PD13
PD12
Reset: 0
0
0
0
0
0
0
0
Figure 8-11. Data Page Register (DPAGE)
Read: Anytime
Write: Anytime
When enabled (DWEN = 1), the value in this register determines which
of the 256 4-Kbyte pages is active in the data window. An access to the
data page memory area ($7000 to $7FFF) forces the contents of
DPAGE to address pins ADDR15–ADDR12 and expansion address pins
ADDR19–ADDR16. Bits ADDR20 and ADDR21 are forced to 1 if
enabled by MXAR. Data chip-select (CSD) must be used in conjunction
with this memory expansion window.
8.5.6 Program Page Register
Address: $0035
Bit 7
6
5
4
3
2
1
Read:
PPA21
Write:
PPA20
PPA19
PPA18
PPA17
PPA16
PPA15
Reset: 0
0
0
0
0
0
0
Figure 8-12. Program Page Register (PPAGE)
Bit 0
PPA14
0
Read: Anytime
Write: Anytime
When enabled (PWEN = 1), the value in this register determines which
of the 256 16-Kbyte pages is active in the program window. An access
to the program page memory area ($8000 to $BFFF) forces the contents
of PPAGE to address pins ADDR15–ADDR14 and expansion address
pins ADDR21–ADDR16. At least one of the program chip-selects (CSP0
or CSP1) must be used in conjunction with this memory expansion
window. This register is used by the CALL and RTC instructions to
facilitate automatic program flow changing between pages of program
memory.
MC68HC812A4 — Rev. 3.0
132
Memory Expansion and Chip-Select
Advance Information
MOTOROLA