MC68HC812A4 Datasheet, PDF (233/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Communications Interface Module (SCI)
Functional Description
14.6.3.1 Character Length
The SCI transmitter can accommodate either 8-bit or 9-bit data
characters. The state of the M bit in SCI control register 1 (SCCR1)
determines the length of data characters. When transmitting 9-bit data,
bit T8 in SCI data register high (SCDRH) is the ninth bit (bit 8).
14.6.3.2 Character Transmission
During an SCI transmission, the transmit shift register shifts a frame out
to the TXD pin. The SCI data registers (SCDRH and SCDRL) are the
write-only buffers between the internal data bus and the transmit shift
register.
To initiate an SCI transmission:
1. Enable the transmitter by writing a logic 1 to the transmitter enable
bit, TE, in SCI control register 2 (SCCR2).
2. Clear the transmit data register empty flag, TDRE, by first reading
SCI status register 1 (SCSR1) and then writing to SCI data
register low (SCDRL). In 9-data-bit format, write the ninth bit to the
T8 bit in SCI data register high (SCDRH).
3. Repeat step 2 for each subsequent transmission.
Writing the TE bit from 0 to 1 automatically loads the transmit shift
register with a preamble of 10 logic 1s (if M = 0) or 11 logic 1s (if M = 1).
After the preamble shifts out, control logic transfers the data from the
SCI data register into the transmit shift register. A logic 0 start bit
automatically goes into the least significant bit position of the transmit
shift register. A logic 1 stop bit goes into the most significant bit position.
Hardware supports odd or even parity. When parity is enabled, the most
significant bit (MSB) of the data character is the parity bit.
The transmit data register empty flag, TDRE, in SCI status register 1
(SCSR1) becomes set when the SCI data register transfers a byte to the
transmit shift register. The TDRE flag indicates that the SCI data register
can accept new data from the internal data bus. If the transmit interrupt
enable bit, TIE, in SCI control register 2 (SCCR2) is also set, the TDRE
flag generates an SCI interrupt request.
Advance Information
MOTOROLA
Serial Communications Interface Module (SCI)
MC68HC812A4 — Rev. 3.0
233