SH7708 Datasheet, PDF (97/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 4.2 Vectored Exception Events
Exception Current
Exceptio Vector
Type
Instructio Exception Event Priority*n Order Address
n
1
Vector
Offset
Reset
Aborted Power-on
1
—
H'A00000000 —
Manual reset
1
—
H'A00000000 —
General Aborted Address error
2
1
—
exception and retried (instruction access)
events
TLB miss (instruction 2
2
—
access)
H'00000100
H'00000400
TLB invalid
2
3
—
(instruction access)
H'00000100
TLB protection
2
4
—
violation
(instruction access)
H'00000100
Reserved instruction 2
5
—
code exception
H'00000100
Illegal slot
2
5
—
instruction exception
H'00000100
Address error
2
6
—
(data access)
H'00000100
TLB miss
2
7
—
(data access)
H'00000400
TLB invalid (data 2
8
—
access)
H'00000100
TLB protection
2
9
—
violation
(data access)
H'00000100
Initial page write
2
10
—
H'00000100
Completed Unconditional trap 2
5
—
(TRAPA instruction)
H'00000100
User breakpoint trap 2
n*²
—
H'00000100
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