SH7708 Datasheet, PDF (217/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bit 8: A5BST1
0
1
Bit 7: A5BST0
0
1
0
1
Description
Access area 5 as normal memory.
value)
(Initial
Burst access of area 5 (4 consecutive accesses). Can
be used when bus width is 8, 16, or 32.
Burst access of area 5 (8 consecutive accesses). Can
be used only when bus width is 8 or 16.
Burst access of area 5 (16 consecutive accesses). Can
be used only when bus width is 8.
Bits 6 and 5—Area 6 Burst Enable (A6BST1–A6BST0): These bits specify whether to use burst
ROM and PCMCIA burst mode in physical space area 6. When burst ROM and PCMCIA burst
mode are used, they set the number of burst transfers.
Bit 6: A6BST1
0
1
Bit 5: A6BST0
0
1
0
1
Description
Access area 6 as normal memory.
value)
(Initial
Burst access of area 6 (4 consecutive accesses). Can
be used when bus width is 8, 16, or 32.
Burst access of area 6 (8 consecutive accesses). Can
be used only when bus width is 8 or 16.
Burst access of area 6 (16 consecutive accesses). Can
be used only when bus width is 8.
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