SH7708 Datasheet, PDF (184/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

9 . 4 Register Descriptions
9 . 4 . 1 Frequency Control Register (FRQCR)
The frequency control register (FRQCR) is a 16-bit read/write register used to specify whether a
clock is output from the CKIO pin, the on/off state of PLL circuit 1, PLL standby, the frequency
multiplication ratio of PLL circuit 1, and the frequency division ratio of the internal clock and the
peripheral clock.
Only word access can be used on the FRQCR register. FRQCR is initialized to H'0102 by a
power-on reset, but retains its value in a manual reset and in standby mode.
SH7708, SH7708S:
Bit: 15
14
13
12
11
10
9
8
Bit name: —
—
—
—
—
—
— CKOEN
Initial value: 0
0
0
0
0
0
0
1
R/W: R
R
R
R
R
R
R
R/W
Bit:
Bit name:
Initial value:
R/W:
7
PLLEN
0
R/W
6
PSTBY
0
R/W
5
STC1
0
R/W
4
STC0
0
R/W
3
IFC1
0
R/W
2
IFC0
0
R/W
1
PFC1
1
R/W
0
PFC0
0
R/W
Bit 8—Clock Enable (CKOEN): Used to output a clock from the CKIO pin or to fix the level of
the CKIO pin. Even when the level is fixed, the SH7708 Series will operate internally at the
frequency before the level was fixed. In case of clock operating mode 7, the CKIO pin becomes an
input pin irrespective of the value of this bit.
Bit 8: CKOEN
0
1
Description
Fixes the level of CKIO terminal.
Outputs a clock from the CKIO pin.(Initial value)
Bit 7—PLL Circuit Enable (PLLEN): Specifies the on/off state of PLL circuit 1. This bit is valid
in clock operating modes 3–6. PLL circuit 1 goes on when the clock operating mode is 0–2 or 7
irrespective of the value of PLLEN.
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