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SH7708 Datasheet, PDF (176/625 Pages) Renesas Technology Corp – SuperH™ RISC engine
9 . 3 Clock Operating Modes
Table 9.3 shows the relationship between the mode control pin (MD2–MD0) combinations and the
clock operating modes. Table 9.4 shows the usable frequency ranges in the clock operating modes.
Table 9.3 Clock Operating Modes
Pin Values
Mod MD MD MD
e 210
Clock I/O PLL2 Div- PLL1 Divider
1
SourceOutput O n / O f f ider 3 On/OffInput
Divider
2
Input
CKIO
Frequenc
y
0 0 0 0 EXTAL CKIO On
Off ON
multi-
plication
ratio: 1
PLL1 PLL1
output
(EXTAL)
1 001
EXTAL CKIO On
Off ON
multi-
plication
ratio: 4
PLL1 PLL1
output
(EXTAL)
×4
2 010
Crystal CKIO On
Off On
oscillato
multi-
r
plication
ratio: 4
PLL1 PLL1
output
(Crystal)
×4
3 011
EXTAL CKIO
On
Off
multi-
plication
ratio: 1
Off PLL2
(initial output
value)
PLL2
(EXTAL)
×1
On PLL1
output
4 100
Crystal CKIO
oscillato
r
On
Off
multi-
plication
ratio: 1
Off PLL2
(initial output
value)
PLL2
(Crystal)
×1
On PLL1
output
7 1 1 1 CKIO —
Off Off On PLL1 PLL1 (CKIO)
output
Mode 0: An external clock is input from the EXTAL pin and undergoes waveform shaping by
PLL circuit 2 before being supplied inside the SH7708 Series. PLL circuit 1 is constantly on, and
there are no frequency range restrictions compared to mode 3. An input clock frequency of 8 MHz
to 60 MHz(SH7708, SH7708S) or 16 MHz to 60 MHz(SH7708R) can be used, and the CKIO
frequency range is 8 MHz to 60 MHz(SH7708, SH7708S) or 16 MHz to 60 MHz(SH7708R).
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