SH7708 Datasheet, PDF (410/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

14.2.1 Smart Card Mode Register (SCSCMR)
The smart card mode register (SCSCMR) is an 8-bit read/write register that selects smart
card interface functions. SCSMR bits 0, 2, and 3 are initialized to 0 by a reset and in standby
mode.
Bit: 7
6
5
4
3
2
1
0
Bit name: —
—
—
—
SDIR SINV
—
SMIF
Initial value: —
—
—
—
0
0
—
0
R/W: R
R
R
R
R/W R/W
R
R/W
Bits 7 to 4 and 1—Reserved: An undefined value will be returned if these bits are read.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
Bit 3: SDIR
0
1
Description
Contents of SCTDR are transferred LSB first, receive data is stored in
SCRDR LSB first.
(Initial
value)
Contents of SCTDR are transferred MSB first, receive data is stored in
SCRDR MSB first.
Bit 2—Smart Card Data Inversion (SINV): Specifies whether to invert the logic level of the
data. This function is used in combination with bit 3 for transmitting and receiving with an
inverse convention card. SINV does not affect the logic level of the parity bit. See section
14.3.4, Register Settings, for information on how parity is set.
Bit 2: SINV
0
1
Description
Contents of SCTDR are transferred unchanged, receive data is stored in
SCRDR unchanged. (Initial value)
Contents of SCTDR are inverted before transfer, receive data is inverted
before storage in SCRDR.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables the smart card interface function.
Bit 0 : SMIF
0
1
Description
Smart card interface function disabled (Initial value)
Smart card interface function enabled
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