SH7708 Datasheet, PDF (318/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bit 5—Underflow Interrupt Control (UNIE): Controls enabling of interrupt generation when the
status flag (UNF) indicating TCNT underflow has been set to 1.
Bit 5: UNIE
0
1
Description
Interrupts due to UNF (TUNI) are not enabled.
value)
Interrupts due to UNF (TUNI) are enabled.
(Initial
Bits 4 and 3—Clock Edge 1, 0 (CKEG1, CKEG0): These bits select the external clock edge when
the external clock is selected, or when the input capture function is used.
Bit 4: CKEG1 Bit 3: CKEG0 Description
0
0
Count/capture register set on rising edge
(Initial
value)
1
Count/capture register set on falling edge
1
—
Count/capture register set on both rising and falling edge
Bits 2 to 0—Timer Prescalers 2–0 (TPSC2–TPSC0): These bits select the TCNT count clock.
Bit 2: TPSC2 Bit 1: TPSC1 Bit 0: TPSC0 Description
0
0
0
Internal clock: count on Pφ/4
(Initial
value)
1
Internal clock: count on Pφ/16
1
0
Internal clock: count on Pφ/64
1
Internal clock: count on Pφ/256
1
0
0
Internal clock: count on clock output of on-chip
RTC (RTCCLK)
1
External clock: count on TCLK pin input
1
0
Reserved ( Do not set)
1
Reserved (Do not set)
304