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SH7708 Datasheet, PDF (136/625 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
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Interrupt
acceptance
Start of interrupt
handling
0.5 Ã Icyc
+ 0.5 Ã Bcyc
+ 2 Ã Pcyc
IRL
5 Ã Icyc
Instruction (instruction
replaced by interrupt
exception handling)
Overrun fetch
IF ID EX EX EX EX
IF
First instruction of interrupt
handler
IF ID EX
IF: Instruction fetch ... Instruction is fetched from memory in which program is stored.
ID: Instruction decode ... Fetched instruction is decoded.
EX: Instruction execution ... Data operation and address calculation are performed in
accordance with result of decoding.
Figure 6.4 Example of Pipeline Operations when IRL Interrupt is Accepted
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