SH7708 Datasheet, PDF (385/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Figure 13.9 shows an example of communication among processors using the multiprocessor
format.
Transmitting
station
Receiving
station A
(ID = 01)
Serial communication circuit
Receiving
station B
(ID = 02)
Receiving
station C
(ID = 03)
Receiving
station D
(ID = 04)
Serial
data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID transmit cycle =
specifies receiving station
MPB: Multiprocessor bit
Data transmit cycle =
data transmission to
receiving station specified
by ID
Figure 13.9 Communication Among Processors Using Multiprocessor Format
(Example:Sending Data H'AA to Receiving Processor A)
Communication Formats: Four formats are available. Parity-bit settings are ignored when
the multiprocessor format is selected. For details see table 13.11.
Clock: See the description in the asynchronous mode section.
Transmitting Multiprocessor Serial Data: Figure 13.10 shows a sample flowchart for
transmitting multiprocessor serial data. The procedure for transmitting multiprocessor serial data
is:
1. SCI status check and transmit data write: Read the serial status register (SCSSR), check that
the TDRE bit is 1, then write transmit data in the transmit data register (SCTDR). Also set
MPBT (multiprocessor bit transfer) to 0 or 1 in SCSSR. Finally, clear TDRE to 0.
2. To continue transmitting serial data: Read the TDRE bit to check whether it is safe to write (if
it reads 1); if so, write data in SCTDR, then clear TDRE to 0.
3. To output a break at the end of serial transmission: Set the SPB0DT bit in the SCSPTR
register to 0, set SPB0IO to 1, then clear TE to 0 in SCSCR.
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