SH7708 Datasheet, PDF (133/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

6 . 4 . 2 Multiple Interrupts
When handling multiple interrupts, an interrupt handler should include the following procedures:
1. Branch to a specific interrupt handler corresponding to a code set in INTEVT. The code in
INTEVT can be used as a branch-offset for branching to the specific handler.
2. Clear the cause of the interrupt in each specific handler.
3. Save SSR and SPC to memory.
4. Clear the BL bit in SR, and set the accepted interrupt level in the interrupt mask bits in SR.
5. Handle the interrupt.
6. Execute the RTE instruction.
When these procedures are followed in order, an interrupt of higher priority than the one being
handled can be accepted after clearing BL in step 4. Figure 6.3 shows a sample interrupt operation
flowchart.
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