 English |
|
|
|
|
|
|
|
| SH7708 Datasheet, PDF (524/625 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
| |||
| ◁ |
17.3.5 Burst ROM Timing
T1
TB2
TB1
TB2
TB1
TB2
TB1
T2
CKIO
tAD
tAD
A25âA4
tAD
tAD
A3âA0
tCSD1
tAH
tCSD2 tRWH
CSn
tRWD
RD/WE
tRSD tRSD tAH
tRDH1
tRWD
tRSD
tAH
tRSD tRWH
RD
tRDS
tRDH1
,,,,,, D31âD0
tBSD
tBSD
,,,,,, BS
,,,,,,,,,,,,,,,,,, WAIT
tBSD
tBSD
tWTS tWTH
tRDS1
tRDH1
Note: In the write cycle, the basic bus cycle is performed.
Figure 17.20 Burst ROM Bus Cycle (No Wait)
510
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese