SH7708 Datasheet, PDF (478/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

CKIO
A25–A16
A12
or A10
A15–A0
CSn
RD/WR
RAS
CAS
DQMxx
D31–D0
BS
CKE
T_r
T_c1 T_c2/T_d1 T_c3/T_d2 T_c4/T_d3 T_d4
(T_pc) (T_pc)
t_AD
t_AD
Row address
,,,,, ^tAD
t_AD
t_AD
t_AD
Row
address
t_AD
t_AD
Read command
Read A
command
t_AD
Row
address
Column address (1–4)
t_CSD1
t_CSD1
t_RWD
t_RWD
t_RASD2 t_RASD2
t_CASD2
t_DQMD
t_CASD2
t_DQMD
t_RDS2 t_RDH2
t_RDS2 t_RDH2
t_BSD
t_BSD
(High)
Figure 16.36 Synchronous DRAM Read Bus Cycle (Burst Read (Single Read × 4),
RCD = 0, CAS Latency = 1, TPC = 1)
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