SH7708 Datasheet, PDF (231/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bit 2—Refresh Control (RFSH): Determines whether or not refreshing of the DRAM connected to
area 2 is performed.
Bit 2: RFSH
0
1
Description
No refresh
value)
Refresh
(Initial
Bit 1—Refresh Mode (RMODE): Selects the refresh mode for the DRAM connected to area 2.
Bit 1: RMODE
0
1
Description
CAS-before-RAS refresh (RFSH must be 1)
value)
Self-refresh (RFSH must be 1)
(Initial
1 0 . 2 . 7 PCMCIA Control Register (PCR)
The PCMCIA control register (PCR) is a 16-bit read/write register that specifies the OE and WE
signal assert/negate timing for PCMCIA interfaces connected to areas 5 and 6. The OE and WE
signal assert pulse widths are designated by the WCR2 wait control bits. This register is initialized
to H'0000 by a power-on reset, but is not initialized by a manual reset or in standby mode, and
retains its contents.
Bit: 15
14
13
12
11
10
9
8
Bit name: —
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Bit name: A5TED1 A5TED0 A6TED1 A6TED0 A5TEH1 A5TEH0 A6TEH1 A6TEH0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bits 15 to 8—Reserved: These bits always read 0. The write value should always be 0.
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