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SH7708 Datasheet, PDF (556/625 Pages) Renesas Technology Corp – SuperH™ RISC engine
Tpcm0 Tpcm1 Tpcm1w Tpcm1w Tpcm1w Tpcm2 Tpcm1 Tpcm1w Tpcm2 Tpcm2w
CKIO
tAD
tAD
A25–A4
tAD
tAD
tAD
A3–A0
tCSD1
tCSD1
CExx
tRWD
tRWD
RD/WR
tRSD
tRSD tRSD
tRSD
RD
(read)
tRDH1
tRDH1
tRDS1
tRDS1
D15–D0
(read)
tBSD tBSD
tBSD tBSD
,,,,,,,,,,,,,,,,,,,, BS
WAIT
tWTS tWTH
tWTS tWTH
tWTS tWTH
Note: Even though burst mode is set, the write cycle operation is the same as in normal
mode.
Figure 17.55 PCMCIA Memory Bus Cycle (Burst Read, TED = 1, TEH = 1, 2 Waits,
Burst Pitch = 3)
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