SH7708 Datasheet, PDF (350/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

• Internal or external transmit/receive clock source: From either baud rate generator (internal) or
SCK pin (external)
• Four types of interrupts: Transmit-data-empty, transmit-end, receive-data-full, and receive-error
interrupts are requested independently.
• When the SCI is not in use, it can be stopped by halting the clock supplied to it, saving
power.
1 3 . 1 . 2 Block Diagram
Figure 13.1 shows a block diagram of the SCI.
RxD
TxD
SCK
Module data bus
SCRDR
SCRSR
SCTDR
SCSSR
SCBRR
SCTSR
SCSCR
SCSMR
SCSPTR
Transmit/
receive
control
Baud rate
generator
Parity generation
Clock
Parity check
External clock
SCI
SCRSR: Receive shift register
SCRDR: Receive data register
SCTSR: Transmit shift register
SCTDR: Transmit data register
SCSMR: Serial mode register
SCSCR: Serial control register
SCSSR: Serial status register
SCBRR: Bit rate register
SCSPTR: Serial port register
Figure 13.1 SCI Block Diagram
Internal
data bus
Pφ
Pφ/4
Pφ/16
Pφ/64
TEI
TXI
RXI
ERI
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