SH7708 Datasheet, PDF (351/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

13.1.3 Pin Configuration
The SCI has the serial pins summarized in table 13.1.
Table 13.1SCI Pins
Pin Name
AbbreviationInput/Output Function
Serial clock pin
SCK
Input/output Clock input/output
Receive data pin RxD
Input
Receive data input
Transmit data pin TxD
Output
Transmit data output
Note:
These pins function as mode input pins MD0–MD02 after a power-on reset. They are made
to function as serial pins by performing SCI operation settings with the TE, RE, CKEI, and
CKE0 bits in SCSCR and the C/A bit in SCSMR. Break status transmission and detection
can be performed by means of the SCI’s SCSPTR register.
13.1.4 Register Configuration
Table 13.2 summarizes the SCI internal registers. These registers select the communication mode
(asynchronous or synchronous), specify the data format and bit rate, and control the transmitter and
receiver sections.
Table 13.2Registers
Name
Abbreviation R/W
Initial
Value*²
Address
Access
Size
Serial mode register SCSMR
R/W H'00
H'FFFFFE80 8
Bit rate register
SCBRR
R/W H'FF
H'FFFFFE82 8
Serial control register SCSCR
R/W H'00
H'FFFFFE84 8
Transmit data register SCTDR
R/W H'FF
H'FFFFFE86 8
Serial status register SCSSR
R/(W)*¹ H'84
H'FFFFFE88 8
Receive data register SCRDR
R
H'00
H'FFFFFE8A 8
Serial port register
SCSPTR
R/W Undefined
H'FFFFFF7C 8
(Initialized)*³
Notes: 1 Only 0 can be written, to clear the flags.
2 Initialized by power-on reset or manual reset.
3. All bits except 2 and 0 are initialized to 0. The value of bits 2 and 0 is undefined.
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