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SH7708 Datasheet, PDF (36/625 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
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2 . 3 . 2 Addressing Modes
Addressing modes and effective address calculation methods are shown in table 2.2.
Table 2.2 Addressing Modes and Effective Addresses
Addressing Instructio
Mode
n Format Effective Address Calculation MethodCalculation Formula
Register direct Rn
Effective address is register Rn. (Operand is â
register Rn contents.)
Register
indirect
@Rn
Effective address is register Rn contents. Rn
Rn
Rn
Register
@Rn+
indirect with
post-increment
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Rn
Rn
Rn + 1/2/4 +
Rn
After instruction
execution
Byte: Rn + 1 â Rn
Word: Rn + 2 â Rn
Longword: Rn + 4 â Rn
Register
@âRn
indirect with
pre-decrement
1/2/4
Effective address is register Rn contents, Byte: Rn â 1 â Rn
decremented by a constant beforehand: 1 for Word: Rn â 2 â Rn
a byte operand, 2 for a word operand, 4 for a
longword operand.
Longword: Rn â 4 â Rn
(Instruction executed
Rn
with Rn after
Rn â 1/2/4 â
calculation)
Rn â 1/2/4
1/2/4
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