SH7708 Datasheet, PDF (232/625 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bits 7 and 6—Area 5 Address OE/WE Assert Delay (A5TED1, A5TED0): These bits specify the
address to OE/WE assert delay time for the PCMCIA interface connected to area 5.
Bit 7: A5TED1 Bit 6: A5TED0 Description
0
0
0.5 cycle delay
value)
1
1.5 cycle delay
1
0
2.5 cycle delay
1
3.5 cycle delay
(Initial
Bits 5 and 4—Area 6 Address OE/WE Assert Delay (A6TED1, A6TED0): These bits specify the
address to OE/WE assert delay time for the PCMCIA interface connected to area 6.
Bit 5: A6TED1 Bit 4: A6TED0 Description
0
0
0.5 cycle delay
value)
1
1.5 cycle delay
1
0
2.5 cycle delay
1
3.5 cycle delay
(Initial
Bits 3 and 2—Area 5 OE/WE Negate Address Delay (A5TEH1, A5TEH0): These bits specify the
OE/WE negate address delay time for the PCMCIA interface connected to area 5.
Bit 3: A5TEH1 Bit 2: A5TEH0 Description
0
0
0.5 cycle delay
value)
1
1.5 cycle delay
1
0
2.5 cycle delay
1
3.5 cycle delay
(Initial
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