W90P710_05 Datasheet, PDF (77/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued.
BITS
[4:3]
[2:0]
COLUMN
SIZE
DESCRIPTION
Number of column address bits in SDRAM bank 0/1
Indicates the number of column address bits in external SDRAM
bank 0/1.
COLUMN [4:3]
Bits
0
0
0
1
1
0
1
1
8
9
10
REVERSED
Size of SDRAM bank 0/1
Indicates the memory size of external SDRAM bank 0/1
SIZE [2:0]
Size of SDRAM （Byte）
00 0
00 1
01 0
01 1
10 0
10 1
11 0
11 1
Bank disable
2M
4M
8M
16M
32M
64M
REVERSED
Timing Control Registers （SDTIME0/1）
W90P710 offers the flexible timing control registers to control the generation and processing of the
control signals and can achieve you use different speed of SDRAM
REGISTER
SDTIME0
SDTIME1
ADDRESS
0xFFF0_1010
0xFFF0_1014
R/W
DESCRIPTION
R/W SDRAM bank 0 timing control register
R/W SDRAM bank 1 timing control register
RESET VALUE
0x0000_0000
0x0000_0000
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Publication Release Date: January 17, 2005
Revision A.2