W90P710_05 Datasheet, PDF (518/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
UART3 Control Register Map
REGISTER ADDRESS R/W
UART3_RBR 0xFFF8_0300 R
UART3_THR 0xFFF8_0300 W
UART3_IER 0xFFF8_0304 R/W
UART3_DLL 0xFFF8_0300 R/W
UART3_DLM 0xFFF8_0304 R/W
UART3_IIR 0xFFF8_0308 R
UART3_FCR 0xFFF8_0308 W
UART3_LCR 0xFFF8_030C R/W
UART3_MCR 0xFFF8_0310 R/W
UART3_LSR 0xFFF8_0314 R
UART3_MSR 0xFFF8_0318 R
UART3_TOR 0xFFF8_031C R
DESCRIPTION
Receive Buffer Register (DLAB = 0)
Transmit Holding Register (DLAB = 0)
Interrupt Enable Register (DLAB = 0)
Divisor Latch Register (LS)
(DLAB = 1)
Divisor Latch Register (MS)
(DLAB = 1)
Interrupt Identification Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
MODEM Status Register
Time Out Register
Timer Control Registers Map
REGISTER ADDRESS R/W
TCR0
0xFFF8_1000 R/W
TCR1
0xFFF8_1004 R/W
TICR0
0xFFF8_1008 R/W
TICR1
0xFFF8_100C R/W
TDR0
0xFFF8_1010 R
TDR1
0xFFF8_1014 R
TISR
0xFFF8_1018 R/C
WTCR
0xFFF8_101C R/W
DESCRIPTION
Timer Control Register 0
Timer Control Register 1
Timer Initial Control Register 0
Timer Initial Control Register 1
Timer Data Register 0
Timer Data Register 1
Timer Interrupt Status Register
Watchdog Timer Control Register
RESET VALUE
Undefined
Undefined
0x0000_0000
0x0000_0000
0x0000_0000
0x8181_8181
Undefined
0x0000_0000
0x0000_0000
0x6060_6060
0x0000_0000
0x0000_0000
RESET VALUE
0x0000_0005
0x0000_0005
0x0000_00FF
0x0000_00FF
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
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