W90P710_05 Datasheet, PDF (373/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
BITS
[6:2]
[0]
Vector
Reserved
DESCRIPTIONS
When the AIC generates the interrupt, VECTOR represents the
interrupt channel number that is active, enabled, and has the highest
priority. If the representing interrupt channel possesses a priority level
0, then the interrupt asserted is FIQ; otherwise, it is IRQ. The value of
VECTOR is copied to the register AIC_ISNR thereafter by the AIC.
This register was restored a value 0 after it was read by the interrupt
handler. This register can help indexing into a branch table to quickly
jump to the corresponding interrupt service routine.
VECTOR [6:2]: Interrupt Vector
0 = no interrupt occurs
1 ~ 31 = representing the interrupt channel that is active, enabled, and
having the highest priority
Reserved
AIC Interrupt Source Number Register (AIC_ISNR)
REGISTER ADDRESS R/W
DESCRIPTION
AIC_ISNR 0xFFF8_2110 ^R Interrupt Source Number Register
31
30
29
28
27
26
0
0
0
0
0
0
23
22
21
20
19
18
0
0
0
0
0
0
15
14
13
12
11
10
0
0
0
0
0
0
7
6
5
4
3
2
0
0
0
IRQID
RESET VALUE
0x0000_0000
25
24
0
0
17
16
0
0
9
8
0
0
1
0
BITS
[31:5]
[4:0]
Reserved
IRQID
DESCRIPTIONS
Reserved
The purpose of this register is to record the interrupt channel number
that is active, enabled, and has the highest priority.
IRQID [4:0]: IRQ Identification
Stands for the interrupt channel number
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Publication Release Date: January 17, 2005
Revision A.2