W90P710_05 Datasheet, PDF (303/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued.
BITS
[2:1] BLOCK_EN[1:0]
[0]
Reserved
DESCRIPTIONS
Audio interface type selection
• If BLOCK_EN[0]=0/1, IIS interface is disable/enable
• If BLOCK_EN[1]=0/1, AC-link interface is disable/enable
The BLOCK_EN[1:0] bits are read/write
Sub-block reset control register (ACTL_RESET)
REGISTER
ADDRESS R/W
DESCRIPTION
ACTL_RESET 0xFFF0_9004 R/W Sub block reset control
RESET VALUE
0x0000_0000
The value in ACTL_RESET register control the reset operation in each sub block.
31
30
29
28
27
26
25
24
23
22
15
14
RECORD_SINGLE[1:0]
7
6
AC_PLAY IIS_RECORD
21
20
13
12
PLAY_SINGLE[1:0]
5
4
IIS_PLAY
19
18
17
11
10
9
Reserved
3
2
Reserved
1
AC_RESET
16
ACTL_RESET
8
AC_RECOR
D
0
IIS_RESET
BITS
[31:17]
[16]
[15:14]
Reserved
ACTL_RESET
RECORD_SINGLE
[1:0]
DESCRIPTIONS
-
Audio controller reset control bit
1 = the whole audio controller is reset
0 = the audio controller is normal operation
The ACTL_RESET bit is read/write
record single/dual channel select bits
2’b11= the record is dual channel
2’b01= the record only select left channel
2’b10= the record only select right channel
2’b00 is reserved
Note that, when ADC is selected as record path, it only
support left channel record.
The PLAY_SINGLE[1:0] bits are read/write
- 303 -
Publication Release Date: January 17, 2005
Revision A.2