W90P710_05 Datasheet, PDF (46/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Table 7.2.13 and Table 7.2.14
Using little-endian and byte access, Program/Data path between register and external memory.
BA = Address whose LSB is 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
BAL = Address whose LSB is 0,2,4,6,8,A,C,E BAU = Address whose LSB is 1,3,5,7,9,B,D,F
BA0 = Address whose LSB is 0,4,8,C BA1 = Address whose LSB is 1,5,9,D
BA2 = Address whose LSB is 2,6,A,E BA3 = Address whose LSB is 3,7,B,F
Table7.2.13 Byte access write operation with little Endian
Access Operation
Write Operation (CPU Register Î External Memory)
XD Width
Word
Half Word
Byte
Bit Number
CPU Reg Data
31 0
ABCD
31 0
ABCD
31 0
ABCD
SA
BA0
BA1
BA2
BA3
BAL
BAU
BA
Bit Number
SD
Bit Number
ED
31 0
DDDD
70
D
31 0
DDDD
15 8
D
31 0
DDDD
23 16
D
31 0
DDDD
31 24
D
31 0
DDDD
70
D
31 0
DDDD
15 8
D
31 0
DDDD
70
D
XA
BA0
BA0
BA0
BA0
BAL
BAL
BA
nWBE [3-0] /
SDQM [3-0]
Bit Number
XD
Bit Number
Ext. Mem Data
Timing Sequence
UUUA
31 0
XXXD
70
D
UUAU
31 0
XXDX
15 8
D
UAUU
31 0
XDXX
23 16
D
AUUU
31 0
DXXX
31 24
D
XXUA
15 0
XD
70
D
XXAU
15 0
DX
15 8
D
Table7.2.14 Byte access read operation with Little Endian
XXXA
70
D
70
D
Access Operation
Read Operation (CPU Register Í External Memory)
XD Width
Word
Half Word
Byte
Bit Number
70
70
70
70
70
70
70
CPU Reg Data
D
C
B
A
D
C
D
SA
BA0
BA1
BA2
BA3
BAL
BAU
BA
Bit Number
70
70
70
70
70
70
70
SD
D
C
B
A
D
C
D
Bit Number
70
70
70
70
70
70
70
ED
D
C
B
A
D
C
D
XA
BA0
BA0
BA0
BA0
BAL
BAL
BA
SDQM [3-0]
Bit Number
XD
Bit Number
Ext. Mem Data
Timing Sequence
UUUA
31 0
ABCD
UUAU
UAUU
31 0
ABCD
31 0
ABCD
31 0
ABCD
AUUU
31 0
ABCD
XXUA
XXAU
15 0
CD
15 0
CD
15 0
CD
XXXA
70
D
70
D
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