W90P710_05 Datasheet, PDF (168/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Channel 0/1 Destination Base Address Register (GDMA_DSTB0, DMA_DSTB1)
Channel 0/1 Destination Base Address Register (GDMA_DSTB0, GDMA_DSTB1)
The GDMA channel starts writing its data to the destination address as defined in this destination base
address register. During a block transfer, the GDMA determines successive destination addresses by
adding to or subtracting from the destination base address.
REGISTER
ADDRESS
GDMA_DSTB0 0xFFF0_4008
GDMA_DSTB1 0xFFF0_4028
R/W
R/W
R/W
DESCRIPTION
Channel 0 Destination Base Address
Register
Channel 1 Destination Base Address
Register
RESET VALUE
0x0000_0000
0x0000_0000
31
30
23
22
15
14
7
6
29
28
27
26
25
24
DST_BASE_ADDR [31:24]
21
20
19
18
17
16
DST_BASE_ADDR [23:16]
13
12
11
10
9
8
DST_BASE_ADDR [15:8]
5
4
3
2
1
0
DST_BASE_ADDR [7:0]
BITS
[31:0]
DST_BASE_ADDR
DESCRIPTIONS
32-bit Destination Base Address
Channel 0/1 Transfer Count Register (GDMA_TCNT0, GDMA_TCNT1)
REGISTER
GDMA_TCNT0
GDMA_TCNT1
ADDRESS
0xFFF0_400C
0xFFF0_402C
R/W
R/W
R/W
DESCRIPTION
Channel 0 Transfer Count Register
Channel 1 Transfer Count Register
RESET VALUE
0x0000_0000
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
TFR_CNT [23:16]
15
14
13
12
11
10
9
8
TFR_CNT [15:8]
7
6
5
4
3
2
1
0
TFR_CNT [7:0]
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