W90P710_05 Datasheet, PDF (259/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued.
BITS
DESCRIPTIONS
TFT Type Select
[5]
TFTTYPE
0 = Sync-type High Color TFT LCD
1 = Sync-type TFT LCD
[4]
LCDTFT
LCD is TFT
0 = LCD is a STN display
1 = LCD is a TFT display
[3]
LCDBW
STN LCD is monochrome
0 = STN LCD is color
1 = STN LCD is monochrome
[2:0]
LCDBPP
LCD bits per pixel
011 = 8 bpp RGB332
100 = 12 bpp RGB444
101 = 16 bpp RGB565
110 = 18 bpp RGB666
NOTE: LCDBPP means the resolution (Bit Per-Pixel) of the image data which store in memory device.
If LUTEN is enabled, LCD Controller will output data from Palette SRAM for 8bpp image. Else, LCD
Controller will treat 8bpp data as RGB332.
At normally, Video Data bus output is RGB888, 24bit. If LCDBUS is set to 01, Video Data bus output
is RGB666, 18bit. If LCDBUS is set to 10, Video Data bus output is RGB332, 8bit. The other bit will be
replaced with zero. Please refer to GPIO chapter to setting this register.
7.10.3.2.
LCD Interrupt Control
There are enable register, clear register, status register for every interrupt type. Enable Mask set/clear
register will branch firmware into interrupt sub-routine. Firmware can read Status register to identify
which interrupt generate now. Write Clear register will clear the interrupt status. Status register will be
set even if firmware disable the Enable register. Main-routine can read Status register and write Clear
register.
LCD Interrupt Enable Register (LCDINTENB)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
LCDINTENB 0xFFFF0_0004 R/W LCD interrupt enable register
0x0000_0000
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Publication Release Date: January 17, 2005
Revision A.2