W90P710_05 Datasheet, PDF (167/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued
BITS
[4]
[3:2]
[1]
[0]
DADIR
GDMAMS
Reserved
GDMAEN
DESCRIPTIONS
Destination Address Direction
1’b0 = Destination address is incremented successively
1’b1 = Destination address is decremented successively
GDMA Mode Select
00 = Software mode (memory-to-memory)
01 = External nXDREQ mode for external device
10 = Reserved
11 = Reserved
-
GDMA Enable
1’b0 = Disables the GDMA operation
1’b1 = Enables the GDMA operation; this bit will be clear automatically
when the transfer is complete on AUTOIEN [19] register bit is on Disable
mode.
Channel 0/1 Source Base Address Register (GDMA_SRCB0, GDMA_SRCB1)
The GDMA channel starts reading its data from the source address as defined in this source base
address register.
REGISTER
GDMA_SRCB0
GDMA_SRCB1
ADDRESS
0xFFF0_4004
0xFFF0_4024
R/W
R/W
R/W
DESCRIPTION
Channel 0 Source Base Address Register
Channel 1 Source Base Address Register
RESET VALUE
0x0000_0000
0x0000_0000
31
30
29
28
27
26
25
24
SRC_BASE_ADDR [31:24]
23
22
21
20
19
18
17
16
SRC_BASE_ADDR [23:16]
15
14
13
12
11
10
9
8
SRC_BASE_ADDR [15:8]
7
6
5
4
3
2
1
0
SRC_BASE_ADDR [7:0]
BITS
[31:0]
DESCRIPTIONS
SRC_BASE_ADDR 32-bit Source Base Address
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Publication Release Date: January 17, 2005
Revision A.2