W90P710_05 Datasheet, PDF (290/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
31
30
Reserved
23
22
VSPW
15
14
7
6
29
21
13
VBPD
5
28
27
26
VSPW
20
19
18
12
11
10
4
3
2
VFPD
25
24
17
16
VBPD
9
8
VFPD
1
0
BITS
[31:30]
Reserved
[29:20] VSPW
[19:10] VBPD
[9:0]
VFPD
DESCRIPTIONS
Reserved
TFT: Vertical sync pulse width determines the VSYNC pulse's high
level width by counting the number of inactive lines.
STN: These bits should be set to zero on STN LCD.
TFT: Vertical back porch is the number of inactive lines at the start
of a frame, after vertical synchronization period.
STN: These bits should be set to zero on STN LCD.
TFT: Vertical front porch is the number of inactive lines at the end of
a frame, before vertical synchronization period.
STN: These bits should be set to zero on STN LCD.
LCD Timing Controller Register 4 (LCDTCON4)
REGISTER
ADDRESS R/W
DESCRIPTION
LCDTCON4 0xFFF0_80BC R/W LCD Timing Control Register 4
RESET VALUE
0x0000_0000
31
30
29
28
27
Reserved
23
22
21
20
19
PCD
15
14
13
12
11
Reserved
7
6
5
4
3
LCDPRESC
26
25
24
PCD
18
17
16
BCD
10
9
8
PLLRDY
2
1
0
CLKSEL
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