W90P710_05 Datasheet, PDF (130/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Management frame fields
PRE ST OP PHYAD REGAD TA DATA
READ 1…1 01 10 AAAAA RRRRR Z0 DDDDDDDDDDDDDDDD
WRITE 1…1 01 01 AAAAA RRRRR 10 DDDDDDDDDDDDDDDD
MII Management Function Configure Sequence
IDLE
Z
Z
READ
WRITE
1. Set appropriate MDCCR.
1. Write data to MIID register
2. Set PHYAD and PHYRAD.
2. Set appropriate MDCCR.
3. Set Write to 1’b0
3. Set PHYAD and PHYRAD.
4. Set bit BUSY to 1’b1 to send a MII 4. Set Write to 1’b1
management frame out.
5. Set bit BUSY to 1’b1 to send a MII
5. Wait BUSY to become 1’b0.
management frame out.
6. Read data from MIID register.
6. Wait BUSY to become 1’b0.
7. Finish the read command.
7. Finish the write command.
FIFO Threshold Control Register (FFTCR)
The FFTCR defines the high and low threshold of internal FIFOs, including TxFIFO and RxFIFO. The
threshold of internal FIFOs is related to EMC request generation and when the frame transmission
starts. The FFTCR also defines the burst length of AHB bus cycle for system memory access.
REGISTER
ADDRESS
FFTCR 0xFFF0_309C
R/W
R/W
DESCRIPTION
FIFO Threshold Control Register
RESET VALUE
0x0000_0101
31
30
23
22
Reserved
15
14
7
6
29
28
27
Reserved
21
20
19
BLength
13
12
11
Reserved
5
4
3
Reserved
26
25
24
18
17
Reserved
10
9
2
1
16
8
TxTHD
0
RxTHD
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