W90P710_05 Datasheet, PDF (66/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
7.3.2.1. SDRAM Components Supported
SIZE
16M bits
64M bits
128M bits
256M bits
Table 7.3.2.1 SDRAM supported by W90P710
TYPE
BANKS
ROW ADDRESSING COLUMN ADDRESSING
2Mx8
2
RA0~RA10
CA0~CA8
1Mx16
2
RA0~RA10
CA0~CA7
8Mx8
4
RA0~RA11
CA0~CA8
4Mx16
4
RA0~RA11
CA0~CA7
2Mx32
4
RA0~RA10
CA0~CA7
16Mx8
4
RA0~RA11
CA0~CA9
8Mx16
4
RA0~RA11
CA0~CA8
4Mx32
4
RA0~RA11
CA0~CA7
32Mx8
4
RA0~RA12
CA0~CA9
16Mx16
4
RA0~RA12
CA0~CA8
AHB Bus Address Mapping to SDRAM Bus
Note: * indicates the signal is not used; ** indicates the signal is fixed at logic 0 and is not used;
The HADDR prefixes have been omitted on the following tables.
A14 ~ A0 are the Address pins of the W90P710 EBI interface;
A14 and A13 are the Bank Select Signals of SDRAM.
SDRAM Data Bus Width: 32-bit
Total Type R x C
R/C
A14 A13
(BS1) (BS0)
A12
A11
A10
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
16M 2Mx8 11x9 R
**
11
** 11* 22 21 20 19 18 17 16 15 14 13 12
C
**
11
** 11* AP 25* 10 9 8 7 6 5 4 3 2
16M 1Mx16 11x8 R
**
10
** 10* 11 21 20 19 18 17 16 15 14 13 12
C
**
10
** 10* AP 25* 10* 9 8 7 6 5 4 3 2
64M 8Mx8 12x9 R
C
64M 4Mx16 12x8 R
C
11
12 11* 23 22 21 20 19 18 17 16 15 14 13 24
11
12 11* 23* AP 25* 10 9 8 7 6 5 4 3 2
11
10 11* 23 22 21 20 19 18 17 16 15 14 13 12
11
10 11* 23* AP 25* 24* 9 8 7 6 5 4 3 2
64M 2Mx32 11x8 R
C
128M* 16Mx8 12x10 R
11
10 11* 23* 22 21 20 19 18 17 16 15 14 13 12
11
10 11* 23* AP 25* 24* 9 8 7 6 5 4 3 2
11
12 11* 23 22 21 20 19 18 17 16 15 14 13 24
C
128M 8Mx16 12x9 R
C
128M 4Mx32 12x8 R
11
12 11* 23* AP 25 10 9 8 7 6 5 4 3 2
11
12 11* 23 22 21 20 19 18 17 16 15 14 13 24
11
12 11* 23* AP 25* 10 9 8 7 6 5 4 3 2
11
10 11* 23 22 21 20 19 18 17 16 15 14 13 12
C
256M* 32Mx8 13x10 R
C
256M* 16Mx16 13x9 R
C
11
10 11* 23* AP 25* 10* 9 8 7 6 5 4 3 2
11
12
24 23 22 21 20 19 18 17 16 15 14 13 25
11
12 24* 23* AP 26* 10 9 8 7 6 5 4 3 2
11
12
24 23 22 21 20 19 18 17 16 15 14 13 25
11
12 24* 23* AP 26* 10* 9 8 7 6 5 4 3 2
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