W90P710_05 Datasheet, PDF (361/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued
BITS
[6]
[5:4]
[3]
[2]
WTIE
WTIS
WTIF
WTRF
DESCRIPTIONS
Watchdog Timer Interrupt Enable
0 = Disable the Watchdog timer interrupt
1 = Enable the Watchdog timer interrupt
Watchdog Timer Interval Select
These two bits select the interval for the Watchdog timer. No matter
which interval is chosen, the reset timeout is always occurred 512
WDT clock cycles later than the interrupt timeout.
WTIS
00
01
10
11
Interrupt
Timeout
2¹⁴ clocks
2¹⁶ clocks
2¹⁸ clocks
2²⁰ clocks
Reset Timeout
2¹⁴ + 1024
clocks
2¹⁶ + 1024
clocks
2¹⁸ + 1024
clocks
2²⁰ + 1024
clocks
Real Time Interval
(CLK=15MHz/256)
0.28 sec.
1.12 sec.
4.47 sec.
17.9 sec.
Watchdog Timer Interrupt Flag
If the Watchdog timer interrupt is enabled, then the hardware will set
this bit to indicate that the Watchdog timer interrupt has occurred. If
the Watchdog timer interrupt is not enabled, then this bit indicates that
a timeout period has elapsed.
0 = Watchdog timer interrupt does not occur
1 = Watchdog timer interrupt occurs
NOTE: This bit is read only, but can be cleared by writing 1 to this bit.
Watchdog Timer Reset Flag
When the Watchdog timer initiates a reset, the hardware will set this
bit. This flag can be read by software to determine the source of
reset. Software is responsible to clear it up manually. If WTRE is
disabled, then the Watchdog timer has no effect on this bit.
0 = Watchdog timer reset does not occur
1 = Watchdog timer reset occurs
NOTE: This bit is read only, but can be cleared by writing 1 to this bit.
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Publication Release Date: January 17, 2005
Revision A.2