W90P710_05 Datasheet, PDF (370/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued
BITS
[5:3]
[2:0]
Reserved
PRIORITY
Reserved
DESCRIPTIONS
Priority Level
Every interrupt source must be assigned a priority level during
initiation. Among them, priority level 0 has the highest priority and
priority level 7 the lowest. Interrupt sources with priority level 0 are
promoted to FIQ. Interrupt sources with priority level other than 0
belong to IRQ. For interrupt sources of the same priority level that
located in the lower channel number has higher priority.
AIC Interrupt Raw Status Register (AIC_IRSR)
REGISTER ADDRESS R/W
DESCRIPTION
AIC_IRSR 0xFFF8_2100 ^R Interrupt Raw Status Register
RESET VALUE
0x0000_0000
31
IRS31
23
IRS23
15
IRS15
7
IRS7
30
IRS30
22
IRS22
14
IRS14
6
IRS6
29
IRS29
21
IRS21
13
IRS13
5
IRS5
28
IRS28
20
IRS20
12
IRS12
4
IRS4
27
IRS27
19
IRS19
11
IRS11
3
IRS3
26
IRS26
18
IRS18
10
IRS10
2
IRS2
25
IRS25
17
IRS17
9
IRS9
1
IRS1
24
IRS24
16
IRS16
8
IRS8
0
RESERVED
BITS
[31:1]
[0]
DESCRIPTIONS
This register records the intrinsic state within each interrupt channel.
IRSx
Reserved
IRSx: Interrupt Status
Indicate the intrinsic status of the corresponding interrupt source
0 = Interrupt channel is in the voltage level 0
1 = Interrupt channel is in the voltage level 1
Reserved
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