W90P710_05 Datasheet, PDF (141/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Continued.
BITS
[21]
[20]
[19]
TXABT
NCS
EXDEF
DESCRIPTIONS
The Transmit Abort Interrupt high indicates the packet incurred
16 consecutive collisions during transmission, and then the
transmission process for this packet is aborted. The transmission
abort is only available while EMC is operating on half-duplex
mode.
If the TXABT is high and EnTXABT of MIEN register is enabled,
the TxINTR will be high. Write 1 to this bit clears the TXABT
status.
1’b0: Packet doesn’t incur 16 consecutive collisions during
transmission.
1’b1: Packet incurred 16 consecutive collisions during
transmission.
The No Carrier Sense Interrupt high indicates the MII I/F signal
CRS doesn’t active at the start of or during the packet
transmission. The NCS is only available while EMC is operating
on half-duplex mode.
If the NCS is high and EnNCS of MIEN register is enabled, the
TxINTR will be high. Write 1 to this bit clears the NCS status.
1’b0: CRS signal actives correctly.
1’b1: CRS signal doesn’t active at the start of or during the packet
transmission.
The Defer Exceed Interrupt high indicates the frame waiting for
transmission has deferred over 0.32768ms on 100Mbps mode, or
3.2768ms on 10Mbps mode. The deferral exceed check will only
be done while bit NDEF of MCMDR is disabled, and EMC is
operating on half-duplex mode.
If the EXDEF is high and EnEXDEF of MIEN register is enabled,
the TxINTR will be high. Write 1 to this bit clears the EXDEF
status.
1’b0: Frame waiting for transmission has not deferred over
0.32768ms (100Mbps) or 3.2768ms (10Mbps).
1’b1: Frame waiting for transmission has deferred over
0.32768ms (100Mbps) or 3.2768ms (10Mbps).
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Publication Release Date: January 17, 2005
Revision A.2