W90P710_05 Datasheet, PDF (3/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 6
2. FEATURES ................................................................................................................................. 6
3. PIN DIAGRAM .......................................................................................................................... 13
4. PIN ASSIGNMENT ................................................................................................................... 14
5. PIN DESCRIPTION................................................................................................................... 20
6. BLOCK DIAGRAM .................................................................................................................... 33
7. FUNCTIONAL DESCRIPTION ................................................................................................. 34
7.1 ARM7TDMI CPU CORE ............................................................................................... 34
7.2 System Manager........................................................................................................... 35
7.2.1 Overview ........................................................................................................................35
7.2.2 System Memory Map......................................................................................................35
7.2.3 Address Bus Generation ................................................................................................38
7.2.4 Data Bus Connection with External Memory ..................................................................38
7.2.5 Bus Arbitration................................................................................................................47
7.2.6 Power management .......................................................................................................48
7.2.7 Power-On Setting ...........................................................................................................50
7.2.8 System Manager Control Registers Map ........................................................................51
7.3 External Bus Interface .................................................................................................. 65
7.3.1 EBI Overview..................................................................................................................65
7.3.2 SDRAM Controller ..........................................................................................................65
7.3.3 EBI Control Registers Map .............................................................................................69
7.4 Cache Controller........................................................................................................... 87
7.4.1 On-Chip RAM .................................................................................................................87
7.4.2 Non-Cacheable Area ......................................................................................................87
7.4.3 Instruction Cache............................................................................................................88
7.4.4 Data Cache ....................................................................................................................90
7.4.5 Write Buffer ....................................................................................................................92
7.4.6 Cache Control Registers Map.........................................................................................92
7.5 Ethernet MAC Controller............................................................................................... 98
7.5.1 EMC Functional Description ...........................................................................................99
7.5.2 EMC Register Mapping ................................................................................................109
7.6 GDMA Controller ........................................................................................................ 162
7.6.1 GDMA Functional Description ......................................................................................162
7.6.2 GDMA Register Map ....................................................................................................163
7.7 USB Host Controller ................................................................................................... 172
7.7.1 USB Host Functional Description .................................................................................172
7.7.2 USB Host Controller Registers Map .............................................................................173
Publication Release Date: January 17, 2005
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Revision A.2