W90P710_05 Datasheet, PDF (330/526 Pages) Winbond – 16/32-bit ARM microcontroller

W90P710
UART Interrupt Enable Register (UART_IER)
REGISTER OFFSET
UART_IER 0x04
R/W
DESCRIPTION
R/W _{Interrupt Enable Register (DLAB = 0)}
RESET VALUE
0x0000_0000
31
30
29
28
27
Reserved
23
22
21
20
19
Reserved
15
14
13
12
11
Reserved
7
6
5
4
3
RESERVED
nDBGACK_E
N
MSIE
26
25
24
18
17
16
10
9
8
2
RLSIE
1
THREIE
0
RDAIE
BITS
[31:5]
[4]
[3]
[2]
[1]
[0]
Reserved
nDBGACK_EN
MSIE
RLSIE
THREIE
RDAIE
DESCRIPTIONS
-
ICE debug mode acknowledge enable
0 = When DBGACK is high, the UART receiver time-out clock will
be held
1 = No matter what DBGACK is high or not, the UART receiver
timer-out clock will not be held
MODEM Status Interrupt (Irpt_MOS) Enable
0 = Mask off Irpt_MOS
1 = Enable Irpt_MOS
Receive Line Status Interrupt (Irpt_RLS) Enable
0 = Mask off Irpt_RLS
1 = Enable Irpt_RLS
Transmit Holding Register
Enable
0 = Mask off Irpt_THRE
1 = Enable Irpt_THRE
Empty
Interrupt
(Irpt_THRE)
Receive Data Available Interrupt (Irpt_RDA) Enable and
Time-out Interrupt (Irpt_TOUT) Enable
0 = Mask off Irpt_RDA and Irpt_TOUT
1 = Enable Irpt_RDA and Irpt_TOUT
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